BiPOM Forum

General => Microcontroller Development Systems => 8051 Development Tools => Topic started by: jkfontes on October 15, 2007, 04:25:59 pm

Title: X2 Feature
Post by: jkfontes on October 15, 2007, 04:25:59 pm

Hello,
     I have been working with the Mini-Max51C2 for quite some time and I noticed that the AT89C51ED2 has an X2 Hardware feature that would allow the cpu to run off of 6 clock cycles instead of 12 cycles. This would inherently make the core run faster using the same crystal. Is it possible to take advantage of this hardware feature (if not already). I know that this feature must be programmed using the Hardware Security Byte, any ideas would help a lot.

-Thank You

Justin

Title: Re: X2 Feature
Post by: vitaliy on October 16, 2007, 01:33:08 am

Hello Justin,
please configure CKCON0 - Clock Control Register (8Fh)

BIT7 Reserved The values for this bit are indeterminite. Do not set this bit.

BIT6 Watchdog Clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit
WDX2 has no effect).
Cleared to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.

BIT5 Programmable Counter Array Clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit
PCAX2 has no effect).
Cleared to select 6 clock periods per peripheral clock cycle. Set to select 12 clock
periods per peripheral clock cycle.

BIT4 Enhanced UART Clock (Mode 0 and 2)
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit
SIX2 has no effect).
Cleared to select 6 clock periods per peripheral clock cycle. Set to select 12 clock
periods per peripheral clock cycle.

BIT3 Timer2 Clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit
T2X2 has no effect).
Cleared to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.

BIT2 Timer1 Clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit
T1X2 has no effect).
Cleared to select 6 clock periods per peripheral clock cycle. Set to select 12 clock
periods per peripheral clock cycle.

BIT1 Timer0 Clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit
T0X2 has no effect).
Cleared to select 6 clock periods per peripheral clock cycle. Set to select 12 clock
periods per peripheral clock cycle.

BIT0 CPU Clock
Cleared to select 12 clock periods per machine cycle (STD mode) for CPU and
all the peripherals. Set to select 6 clock periods per machine cycle (X2 mode)
0X2
and to enable the individual peripherals[ch8217]X2[ch8217] bits. Programmed by hardware after
Power-up regarding Hardware Security Byte (HSB), Default setting, X2 is
cleared.

Reset Value = 0000 000[ch8217]HSB.

Title: Re: X2 Feature
Post by: terryjonse on September 19, 2011, 04:13:43 am

I noticed that the AT89C51ED2 has an X2 Hardware feature that would allow the cpu to run off of 6 clock cycles instead of 12 cycles. This would inherently make the core run faster using the same crystal. Is it possible to take advantage of this hardware feature (if not already). I know that this feature must be programmed using the Hardware Security Byte, any ideas would help a lot.


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